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2016年10月19日电院承办芯启源(上海)半导体科技有限公司宣讲会

[ 2016年10月17日 ]

举办方:电院

举办时间:2016年10月19日 10:00~12:00

举办地点:电信群楼3-100 报告厅

单位名称:芯启源(上海)半导体科技有限公司

联系方式:许丹、18516250814、hr@corigine.com

专业要求:信息安全类、自动化类、计算机类、电子类、软件工程类

学历要求:博士、硕士

宣讲会介绍:

标题:芯启源校招ASIC设计、验证及软件工程师(年薪22W+)

 

工作地点:上海、南京、湖州

学历要求:硕士及以上

 

公司介绍:

  芯启源电子科技有限公司是一家中外合资企业,由中美高科技团队创建并运营管理,公司在美国硅谷、上海张江自贸区、南京经开区、湖州开发区、香港等地设有公司和研发中心。

  公司目前正在进行的项目有USB3.1 Host/Device Controller、PCIe Gen3 RC/EP/Switch Controller、AR/VR,以及企业级网络芯片,如TCAM等。

  公司是全球仅有的四家(中国唯一一家)获得USB3 Host认证的IP供应商之一,现有团队全部来自Marvell、nVidia、IBM、AMD、Broadcom等国际顶级芯片公司。

 

薪资待遇:

(1). 每月基本工资: 上海 15.5K+, 南京 14K+

(2). 年终奖:      1-4 个月(至少1个月)

(3). 项目奖:       根据项目情况发放

(4). 股权激励:    入职发放+每年根据绩效发放   

(5). 餐费补贴:    每日45元

(6). 带薪年假:    每年15天(可折现)

(7). 美国硅谷培训

(8). 弹性工作制、免费健身、每日免费零食、定期免费体检、节日及生日福利。。。。。。

 

联系方式:

(1). 简历投递邮箱: hr@corigine.com   (请参照格式: 姓名_学校_专业_职位)

(2). 招聘微信群:

芯启源校招-二维码.jpg

 

职位描述:

(1). ASIC Design Engineer

Job Responsibility:

· Digital design of cutting-edge digital IP/SoC

· Work with architect engineers to develop design specification of IP/SoC features

· RTL Implementation in Verilog HDL, CDC check, synthesis and timing analysis

· Work closely with verification and validation engineers to fix issues

 

Job Requirements:

·  MS major in ME/EE or related

·  Experience with front-end IP/SoC design

·  Skills in RTL Coding, synthesis, timing analysis and closure

·  Knowledge of FPGA development is a plus

·  Strong script skill in Perl/Tcl is a plus

 

(2). ASIC Verification Engineer

Job Responsibility:

·  Work with DV team to figure out verification strategies for cutting-edge digital IP/SoC.

·  Build and maintain UVM based verification test bench

·  Develop verification test plan and test cases

·  Develop behavior models to improve DV efficiency

·  Work closely with designer to fix RTL bugs

 

Job Requirements:

·  MS major in ME/EE or related

·  Good understanding of ASIC front design flow

·  Knowledge of Verilog/System Verilog language

·  Knowledge of Verification methodology such as UVM is a plus

·  Knowledge of assertion based verification and coverage oriented verification is a plus

·  Strong programming skill in Perl/Tcl is a plus

 

(3). Embedded Software Engineer

Job Responsibility:

·  Master of Linux Kernel and RTOS development

·  Firmware and Device driver development

·  Analyzing root cause and Cooperate with IP design/verification engineer to fix issues

·  Reference design and product support

 

Job Requirements:

·  C language knowledge and coding experience

·  Kernel and device driver knowledge on Linux

·  RTOS knowledge is a plus

·  Knowledge of bus protocol is a plus

·  QA and Test automation experience is a plus

·  Python, C++, Perl is plus


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